Product Summary

The 74HCT125PW is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC standard no. 7A. The 74HCT125PW is four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a HIGH impedance OFF-state.

Parametrics

74HCT125PW absolute maximum ratings: (1)propagation delay nA to nY CL = 15 pF; VCC = 5 V, tPHL/tPLH: 12 ns; (2)input capacitance, CI: 3.5 pF; (3)power dissipation capacitance per buffer, CPD: 24 pF.

Features

74HCT125PW features: (1)Output capability: bus driver; (2)ICC category: MSI.

Diagrams

74HCT125PW block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
74HCT125PW
74HCT125PW

NXP Semiconductors

Buffers & Line Drivers QUAD 3-STATE BUS BUF

Data Sheet

Negotiable 
74HCT125PW,112
74HCT125PW,112

NXP Semiconductors

Buffers & Line Drivers QUAD 3-STATE BUS BUF

Data Sheet

0-1: $0.23
1-25: $0.20
25-100: $0.16
100-250: $0.13
74HCT125PW,118
74HCT125PW,118

NXP Semiconductors

Buffers & Line Drivers QUAD 3-STATE BUS BUF

Data Sheet

0-1: $0.08
1-25: $0.07
25-100: $0.07
100-250: $0.07